DragonFly On-Line Manual Pages
ck_pr_fence_store(3) DragonFly Library Functions Manual ck_pr_fence_store(3)
NAME
ck_pr_fence_store - enforce partial ordering of store operations
LIBRARY
Concurrency Kit (libck, -lck)
SYNOPSIS
#include <ck_pr.h>
void
ck_pr_fence_store(void);
void
ck_pr_fence_strict_store(void);
DESCRIPTION
The ck_pr_fence_store() function enfores the ordering of any memory
store, ck_pr_store() and atomic read-modify-write operations relative to
the invocation of the function. This function always serve as an implicit
compiler barrier. On architectures implementing CK_MD_TSO, this operation
only serves as a compiler barrier and no fences are emitted. On
architectures implementing CK_MD_PSO and CK_MD_RMO, a store fence is
emitted. To force the unconditional emission of a store fence, use
ck_pr_fence_strict_store().
EXAMPLE
#include <ck_pr.h>
static int a = 0;
static int b = 0;
static int c = 0;
void
function(void)
{
ck_pr_store_int(&a, 1);
/*
* Guarantee that the store to a is completed
* with respect to the stores of b and c.
*/
ck_pr_fence_store();
ck_pr_store_int(&b, 2);
ck_pr_store_int(&c, 2);
return;
}
RETURN VALUES
This function has no return value.
SEE ALSO
ck_pr_stall(3), ck_pr_fence_atomic(3), ck_pr_fence_atomic_store(3),
ck_pr_fence_atomic_load(3), ck_pr_fence_load(3),
ck_pr_fence_load_atomic(3), ck_pr_fence_load_store(3),
ck_pr_fence_load_depends(3), ck_pr_fence_memory(3), ck_pr_barrier(3),
ck_pr_fas(3), ck_pr_load(3), ck_pr_store(3), ck_pr_faa(3), ck_pr_inc(3),
ck_pr_dec(3), ck_pr_neg(3), ck_pr_not(3), ck_pr_add(3), ck_pr_sub(3),
ck_pr_and(3), ck_pr_or(3), ck_pr_xor(3), ck_pr_cas(3), ck_pr_btc(3),
ck_pr_bts(3), ck_pr_btr(3)
Additional information available at http://concurrencykit.org/
April 7, 2013