DragonFly On-Line Manual Pages

Search: Section:  


SDHCI(4)              DragonFly Kernel Interfaces Manual              SDHCI(4)

NAME

sdhci - PCI SD Host Controller bridge driver

SYNOPSIS

To compile this driver into the kernel, place the following lines in your kernel configuration file: device mmc device mmcsd device sdhci Alternatively, to load the driver as a module at boot time, place the following lines in loader.conf(5): mmc_load="YES" mmcsd_load="YES" sdhci_pci_load="YES" sdhci_acpi_load="YES"

DESCRIPTION

The sdhci driver supports PCI devices with class 8 and subclass 5 according to SD Host Controller Specification, as well as various controllers discovered via ACPI. Driver supports up to six slots per controller for either 1 or 4bit SD cards, or 1, 4 or 8bit MMC/eMMC slots per controller. Supports up to 50MHz HighSpeed transfer speed on SD and MMC/eMMC cards, as well as DDR52 transfer mode on eMMC. Driver attaches mmc bus to the respective slot on card insertion and detaches it on card removing.

HARDWARE

The sdhci driver supports different specification compatible chips. The following chips have been verified to work: * ENE CB712 * ENE CB714 * RICOH R5C822 * RICOH R5CE823 * TI PCIXX21/XX11 * Intel Bay-/Cherry-Trail eMMC and SDXC card reader * AMDI0040 eMMC controller (AMD Zen+ SoC) * O2 Micro OZ620 SD/MMC card reader * O2 Micro OZ777 SD/MMC card reader

LOADER TUNABLES

hw.sdhci.debug Set verbose debugging level. Levels 0 to 3 are currently used. hw.sdhci.adma2_test Set to 1 to allow using ADMA2 transfer mode on untested controller models. hw.sdhci.sdma_disable Set to 1 to disable the SDMA transfer mode. hw.sdhci.adma2_disable Set to 1 to disable the ADMA2 transfer mode. hw.sdhci.quirk_clear Set bit mask of quirks to clear. hw.sdhci.quirk_set Set bit mask of quirks to set, this is applied after the clearing mask. hw.sdhci_enable_msi Set to 0 to disable MSI interrupt use.

SYSCTL VARIABLES

hw.sdhci.debug Set verbose debugging level. dev.sdhci_acpi.X.timeout dev.sdhci_pci.X.timeout Maximum timeout for SDHCI transfers (in secs).

SEE ALSO

mmc(4), mmcsd(4) SD Specifications, Part 2, SD Host Controller, Simplified Specification.

HISTORY

The sdhci driver was imported from FreeBSD into DragonFly 2.7 and updated by Markus Pfeiffer <profmakx@dragonflybsd.org>.

AUTHORS

Alexander Motin <mav@FreeBSD.org>

BUGS

Many of existing SD controller chips have some nonstandard requirements, proprietary registers and hardware bugs, requiring additional handling. ENE chips are handled to work fine, while some revisions of RICOH and TI controllers still do not see cards without some additional initialization. DragonFly 6.5-DEVELOPMENT May 13, 2026 DragonFly 6.5-DEVELOPMENT

Search: Section: